iCetusABOUT THE PROJECT
iCetus

Our Motivation:

Today's computers are all Multicores. With parallelization techniques, one can convert sequential code into multi-threaded or vectorized code to simultaneously use multiple processors' power in a modern shared-memory Architecture.

Our Goal:

Our objective with the iCetus tool is to engage users in the optimization process, tailoring their involvement to their preferences and expertise. iCetus facilitates the application of automated parallelization, manual optimizations, and LLM-suggested optimizations. The effectiveness and correctness of these optimizations can be confirmed using the CaRV method and tool.

Utilizing default or customized parallelization options enables running Cetus on the entire codebase, ensuring that parallelization is applied across the entire application. This approach also provides detailed insights into how the compiler analyzes and transforms the code, and the impact of these techniques on the overall codebase.

On the other hand, the CaRV tool is particularly advantageous for targeted optimization efforts focused on specific code sections. It is recommended when particular segments of the code require optimization, allowing for optimization and rapid validation of these segments independently of the rest of the code. This targeted approach helps to quickly iterate and refine optimizations in critical areas, ensuring optimal performance.

iCetus can be used for self-paced learning of different parallelization techniques.

Integrated Tools and Techniques in iCetus: